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Design and analysis of interconnection architectures for on-chip digital systems
URI:
http://urn.fi/URN:NBN:fi:bib:me:W01152132900
author
Lahtinen, Vesa
inLanguage
en
isPartOf
Fennica
name
Design and analysis of interconnection architectures for on-chip digital systems
P60049
<http://rdaregistry.info/termList/RDAContentType/1020>
Instances
2004 : Tampereen teknillinen korkeakoulu
View this in Finna
Design and analysis of interconnection architectures for on-chip digital systems
URI:
http://urn.fi/URN:NBN:fi:bib:me:I01152132900
datePublished
2004
description
kuvitettu
identifier
propertyID:
FI-FENNI
value:
784158
propertyID:
FI-MELINDA
value:
000345072
propertyID:
FI-MELINDA
value:
005103080
propertyID:
skl
value:
fx784158
isbn
9521511893
isPartOf
Fennica
Tampereen teknillinen korkeakoulu. Sarja B, Arkkitehtuurin osasto
name
Design and analysis of interconnection architectures for on-chip digital systems
numberOfPages
162 [2] s.
P60048
<http://rdaregistry.info/termList/RDACarrierType/1048>
<http://rdaregistry.info/termList/RDACarrierType/1049>
P60050
<http://rdaregistry.info/termList/RDAMediaType/1007>
publication
location:
Tampere
organizer:
Tampereen teknillinen korkeakoulu Tampereen teknillinen yliopisto. Optoelektroniikan tutkimuskeskus
publisher
Tampereen teknillinen korkeakoulu
Tampereen teknillinen yliopisto. Optoelektroniikan tutkimuskeskus
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