Design of stacked-MOS transistor mm-wave class C amplifiers for Doherty power amplifiers
Montaseri, Mohammad Hassan; Aikio, Janne; Rahkonen, Timo; Pärssinen, Aarno (2018-12-13)
M. H. Montaseri, J. Aikio, T. Rahkonen and A. Pärssinen, "Design of Stacked-MOS Transistor mm-Wave Class C Amplifiers for Doherty Power Amplifiers," 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), Tallinn, 2018, pp. 1-5. doi: 10.1109/NORCHIP.2018.8573519
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https://urn.fi/URN:NBN:fi-fe201902134757
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Abstract
This paper discusses the design requirements of class C auxiliary (aux) amplifiers deployed in Doherty power amplifiers (DPA). Taking conduction angle and back-off (BO) level into account a global design chart is presented which can be utilized to properly dimension the aux amplifier. Based on the proposed method a class C power amplifier is designed and exploited in a DPA circuit at 28GHz which is evaluated using simulations based on 45nm CMOS technology. Simulations reveal 27dBm saturated output power, 60% maximum drain efficiency (DE), 45% DE at 6dB BO, and 2 times efficiency enhancement at 6dB BO which is a new record in this trend.
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