A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS
Martelius, Mikko; Stadius, Kari; Lemberg, Jerry; Roverato, Enrico; Nieminen, Tero; Antonov, Yury; Anttila, Lauri; Valkama, Mikko; Kosunen, Marko; Ryynanen, Jussi (2018-08-07)
Martelius, Mikko
Stadius, Kari
Lemberg, Jerry
Roverato, Enrico
Nieminen, Tero
Antonov, Yury
Anttila, Lauri
Valkama, Mikko
Kosunen, Marko
Ryynanen, Jussi
IEEE
07.08.2018
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202002041824
https://urn.fi/URN:NBN:fi:tuni-202002041824
Kuvaus
Peer reviewed
Tiivistelmä
This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.
Kokoelmat
- TUNICRIS-julkaisut [16983]