Investigation on grid synchronization methods in PV inverters during unbalanced conditions
Subramanian, Siva Kumar (2018)
Subramanian, Siva Kumar
2018
Electrical Engineering
Tieto- ja sähkötekniikan tiedekunta - Faculty of Computing and Electrical Engineering
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Hyväksymispäivämäärä
2018-06-06
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tty-201805251863
https://urn.fi/URN:NBN:fi:tty-201805251863
Tiivistelmä
Photovoltaic power is vital to meet the future global energy demand. DC power from the photovoltaics is converted to AC power using PV inverters and integrated into the AC power electrical grid. The synchronous operation of PV inverter with the electrical grid is facilitated by the phase locked loop. The SRF-PLL in PV inverters extracts the phase angle and frequency information of the FFPS component of the electrical grid voltages. The transformation blocks in the control system of the PV inverter uses this information and produces grid synchronized control signals. The SPWM uses the control signals to produce switching pulses accordingly so that the PV inverter output currents are synchronized with the electrical grid voltages. The performance of PLL is very good in balanced grid conditions, where only FFPS component is present. However, the estimation of phase angle and frequency of FFPS component using SRF-PLL during unbalance conditions contains oscillations and hence it is not satisfactory. This will cause unwanted tripping of the PV inverter from the electrical grid and the harmonics may cause damage to the control system of the PV inverter.
In this thesis, DSC-PLL is investigated, to eliminate the effect of FFNS component and estimate the phase angle and frequency of FFPS component of grid voltages. The delayed signal cancellation method promises to eliminate the FFNS component inside the control block of PLL, by inducing a time delay to the original voltage signal. The resultant voltage signal contains only the FFPS component. The PLL estimates the phase angle and frequency of the remaining FFPS component.
The DSC operation is implemented in two ways, one in the dq-domain and other in the αβ-domain. In the dq-DSC-PLL method, the elimination of FFNS component and the estimation of phase angle and frequency of FFPS component are perfomed inside the control loop of PLL. The small signal model of dq-DSC-PLL is derived. The symmetrical optimum method is used to design the control parameters of PI controller in the dqDSC-PLL. Whereas, in the αβ-DSC-PLL method, the elimination of FFNS component is done in αβ-domain and the estimation of phase angle and frequency information of FFPS component is performed in dq-domain. The small signal model of αβ-DSC-PLL is derived. Loop-shaping technique is used to design the control parameters of PI controller in the αβ-DSC-PLL.
In this thesis, DSC-PLL is investigated, to eliminate the effect of FFNS component and estimate the phase angle and frequency of FFPS component of grid voltages. The delayed signal cancellation method promises to eliminate the FFNS component inside the control block of PLL, by inducing a time delay to the original voltage signal. The resultant voltage signal contains only the FFPS component. The PLL estimates the phase angle and frequency of the remaining FFPS component.
The DSC operation is implemented in two ways, one in the dq-domain and other in the αβ-domain. In the dq-DSC-PLL method, the elimination of FFNS component and the estimation of phase angle and frequency of FFPS component are perfomed inside the control loop of PLL. The small signal model of dq-DSC-PLL is derived. The symmetrical optimum method is used to design the control parameters of PI controller in the dqDSC-PLL. Whereas, in the αβ-DSC-PLL method, the elimination of FFNS component is done in αβ-domain and the estimation of phase angle and frequency information of FFPS component is performed in dq-domain. The small signal model of αβ-DSC-PLL is derived. Loop-shaping technique is used to design the control parameters of PI controller in the αβ-DSC-PLL.