Instruction Buffer with Limited Control Flow and Loop Nest Support
Guzma, Vladimir; Pitkänen, Teemu; Takala, Jarmo (2011)
Guzma, Vladimir
Pitkänen, Teemu
Takala, Jarmo
IEEE
2011
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tty-201201181010
https://urn.fi/URN:NBN:fi:tty-201201181010
Kuvaus
Peer reviewed
Tiivistelmä
In this work, we present a minimalistic, energy efficient implementation of instruction buffer. We use loop detection and execution trace analysis to find most commonly executed loops in already scheduled application and tailor instruction buffer size to the size of most commonly executed loop(s). In addition to our previous work, we allow buffering of loops with limited control flow (early exit from the loop or early return to the beginning of the loop). We also show how analysis of loop nests can decrease the number of times loop body is copied from memory into the buffer. Our results show that in case of favorable loop nest, we can execute all but initial loop iterations from the instruction buffer, keeping instruction memory in the deselect mode.
Kokoelmat
- TUNICRIS-julkaisut [16726]