Integrated High-Speed DSP for All-Digital RF Transmitters

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Journal Title
Journal ISSN
Volume Title
School of Electrical Engineering | Doctoral thesis (article-based) | Defence date: 2017-11-08
Date
2017
Major/Subject
Mcode
Degree programme
Language
en
Pages
157
Series
Aalto University publication series DOCTORAL DISSERTATIONS, 190/2017
Abstract
During the recent years, the design of integrated RF transceivers has been shifting towards the digital domain. There are two main motivations behind this change. First, the reconfigurability needed in 4G and 5G wireless communication calls for A/D and D/A conversion as close to the antenna as possible. Second, the advance of deep-submicron CMOS processes poses new design challenges for traditional analog topologies, whereas digital circuits typically benefit from decreasing linewidth and supply voltage.  This dissertation presents advances related to all-digital RF transmitters, with special focus on the cartesian and outphasing architectures. Specifically, this work attempts to extend the share of transmitter functionality that is implemented using integrated digital signal processing (DSP). The main motivation in the research of DSP-based solutions is that, besides exploiting all the benefits of nanoscale CMOS, they also take advantage of highly automated standard design methodologies, thus enabling straightforward design reusability. The research work is demonstrated with two integrated circuit (IC) implementations and seven scientific publications.  In the context of all-digital cartesian transmitters, this dissertation focuses on the replacement of the traditional analog filters for D/A reconstruction and out-of-band emission attenuation by means of DSP circuits. The D/A reconstruction filter is replaced by a programmable interpolation chain, which is specifically optimized for 4G mobile transmitters. Furthermore, a new DSP technique based on delta-sigma modulation and mismatch-shaping is proposed for receive band noise attenuation. The latter technique is experimentally verified for a prototype 4G transmitter IC fabricated in 28nm CMOS, with measurement results demonstrating up to 20 dB noise attenuation at a programmable 30-400 MHz duplex distance.  All-digital outphasing transmitters push the D/A conversion even closer to the antenna, by utilizing time-domain processing of rail-to-rail signals up to the power amplifiers. This dissertation presents a new delay-line phase modulator architecture, which improves the modulation linearity by performing DSP-intensive first-order hold phase interpolation. Measurement results on a prototype multilevel outphasing transmitter IC, fabricated in 28nm FDSOI CMOS, demonstrate that this concept enables up to 400 MHz instantaneous RF bandwidth, which is a 10x improvement compared with the state-of-art.
Description
Supervising professor
Ryynänen, Jussi, Prof., Aalto University, Department of Electronics and Nanoengineering, Finland
Thesis advisor
Kosunen, Marko, Dr., Aalto University, Department of Electronics and Nanoengineering, Finland
Keywords
RF transmitter, digital signal processing, I/Q modulation, sample rate conversion, RX-band noise, outphasing modulation, phase interpolation
Other note
Parts
  • [Publication 1]: E. Roverato, M. Kosunen, J. Lemberg, T. Nieminen, K. Stadius, J. Ryynänen, P. Eloranta, R. Kaunisto, and A. Pärssinen. A Configurable Sampling Rate Converter for All-Digital 4G Transmitters. In 21st European Conference on Circuit Theory and Design (ECCTD), Dresden, Germany, September 2013.
    DOI: 10.1109/ECCTD.2013.6662279 View at publisher
  • [Publication 2]: E. Roverato, M. Kosunen, J. Lemberg, K. Stadius, and J. Ryynänen. RX-Band Noise Reduction in All-Digital Transmitters With Configurable Spectral Shaping of Quantization and Mismatch Errors. IEEE Transactions on Circuits and Systems—Part I: Regular Papers, vol. 61, no. 11, pp. 3256–3265, November 2014.
    DOI: 10.1109/TCSI.2014.2335012 View at publisher
  • [Publication 3]: E. Roverato, M. Kosunen, and J. Ryynänen. The Synthesis of Noise Transfer Functions for Bandpass Delta-Sigma Modulators with Tunable Center Frequency. In 22nd European Conference on Circuit Theory and Design (ECCTD), Trondheim, Norway, August 2015.
    DOI: 10.1109/ECCTD.2015.7300122 View at publisher
  • [Publication 4]: E. Roverato, M. Kosunen, K. Cornelissens, S. Vatti, P. Stynen, K. Bertrand, T. Korhonen, H. Samsom, P. Vandenameele, and J. Ryynänen. All-Digital RF Transmitter in 28nm CMOS with Programmable RX-Band Noise Shaping. In IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, February 2017
    DOI: 10.1109/ISSCC.2017.7870341 View at publisher
  • [Publication 5]: J. Lemberg, M. Kosunen, E. Roverato, M. Martelius, K. Stadius, L. Anttila, M. Valkama, and J. Ryynänen. Digital Interpolating Phase Modulator for Wideband Outphasing Transmitters. IEEE Transactions on Circuits and Systems, Part I: Regular Papers, vol. 63, no. 5, pp. 705–715, May 2016.
    DOI: 10.1109/TCSI.2016.2529280 View at publisher
  • [Publication 6]: M. Kosunen, J. Lemberg, M. Martelius, E. Roverato, T. Nieminen, M. Englund, K. Stadius, L. Anttila, J. Pallonen, M. Valkama, and J. Ryynänen. A 0.35-to-2.6GHz Multilevel Outphasing Transmitter with a Digital Interpolating Phase Modulator Enabling up to 400MHz Instantaneous Bandwidth. In IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, February 2017.
    DOI: 10.1109/ISSCC.2017.7870342 View at publisher
  • [Publication 7]: E. Roverato, M. Kosunen, J. Lemberg, M. Martelius, K. Stadius, L. Anttila, M. Valkama, and J. Ryynänen. A High-Speed DSP Engine for First-Order Hold Digital Phase Modulation in 28nm CMOS. IEEE Transactions on Circuits and Systems—Part II: Express Briefs, submitted for review, August 2017
Citation